1. Field of the Invention
The present invention relates to an image control device feasible for a display, a digital camera, a printer or similar apparatus having at least one of an image data displaying function, an image data reproducing function and an image data printing function as well as to an image control method and a digital camera.
2. Description of the Background Art
It is a common practice in the imaging art to read out image data stored in a frame memory and display them on a TV (television) set or similar display. However, it has been difficult to rewrite the image data of the frame memory during image display period due to disturbance to the image ascribable to noise and limited available time. In light of this, an arrangement is generally made such that a CPU (Central Processing Unit) accesses the frame memory during blanking period particular to broadcast standards in order to rewrite the image data. This arrangement, however, brings about a problem that the mean access rate of the CPU to the frame memory is extremely low when an image is displayed.
In order to solve the above problem, use may be made of a FIFO (First-In First-Out) memory or similar buffer memory, as proposed in the past. Data are transferred to the buffer memory at a rate higher than the clock rate of a TV signal, so that the remaining time is available for rewriting the data stored in the frame memory. Generally, the buffer memory has a capacity exceeding the number of pixels of an image in the horizontal direction. The data temporarily stored in the buffer memory are read out at the clock rate of the TV signal. This guarantees a period of time for the CPU to access the frame memory even during periods other than the blanking period.
However, even the buffer memory scheme prevents the CPU from accessing the frame memory during the transfer of one line of image data from the frame memory to the buffer memory. The waiting time of the CPU is wasteful because the clock rate for the data transfer from the frame memory to the buffer memory is several times as high as the clock rate of the TV signal.
On the other hand, an image display system often includes an electronic zooming function. Y data representative of luminance and CR and CB data representative of pairs of colors are written to the frame memory in a 4:2:2 dot-sequential format. In this case, a conventional, electronic zoom circuit lowers image quality because the sampled CR and CB pairs are disturbed because of addresses, depending on magnification. To avoid the disturbance to the CR and CB pairs, it has been customary to again sample the CR and CB data for causing them to coincide, restore the Y, CR and CB data to a 4:4:4 format, and then execute zooming.
The applicant has proposed an implementation for enhancing the performance of the entire system. The implementation reduces the waiting time of a CPU output an access request without regard to a position or time in a one-line display period, i.e., implements rapid response to the access request. Besides the enhanced performance of the entire system, there is an increasing demand for more advanced functions. Advanced functions, however, aggravate power consumption and must therefore be accompanied by power saving arrangements.